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IC Packaging Design Engineer

Canvendor
14 hours ago
Contract
On-site
Chandler, AZ, United States
LinkedIn

Job Title : IC Packaging Design Engineer Job Location : Chandler, AZ/ Hillsboro, OR (Onsite) Duration : 12+ Months Job Description: As an IC Packaging Design Engineer, you'll work on physical design and layout of IC packages, driving substrate design and SI/PI-aware implementation for high-performance semiconductor products. You'll collaborate closely with cross-functional teams to ensure designs meet performance, manufacturability, yield, and reliability targets. What You'll Do Perform physical design and layout of IC packages Execute substrate design and layout Implement SI/PI-aware design practices Design for performance, manufacturability, yield, and reliability (DFM/DFY/DFR) Ensure design rule compliance across all deliverables Use Siemens (Mentor) Xpedition (XPD) or Cadence Allegro/Advanced Package Designer (APD/SiP) for design execution What You Bring Bachelor's or Master's degree in Electrical/Electronics Engineering Senior-level: ~10+ years in IC packaging / package design, OR Mid-level: 4–6+ years (MS) or 6+ years (BS) in IC packaging / package design Strong hands-on experience in Siemens Xpedition (XPD) or Cadence Allegro/APD (SiP) Proven experience in substrate design, SI/PI-aware implementation, and design rule compliance

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